A multilayer circuit board in which wiring patterns and semiconductor ICs are embedded usually has a thick core layer made of a core material such as a glass cloth impregnated with resin to prevent the board from being distorted or deformed in the course of production.
However, the core layer tends to increase the thickness of the multilayer circuit board. Therefore, demand for thinned is not fulfilled in some cases. A method to reduce the thickness of the entire board is to form a board using only thin resin layers and no core layer. In this way, the board is subject to significant distortion in the course of production. This distortion causes no problems when the pitches of embedded wiring patterns and semiconductor IC electrodes are sufficiently large. Conversely, it causes connection failures when their pitches are small.
In order to embed wiring patterns having smaller pitches in a board with no core layer, the production processes should proceed with the board immobilized on a support substrate so as to prevent the board from being distorted or deformed. Such techniques are disclosed in the Japanese Patent Application Laid Open Nos. 2005-150417 and 2005-243999. Techniques for embedding semiconductor ICs in a multilayer circuit board are described in the Japanese Patent Application Laid Open Nos. H9-321408, 2002-246500, 2001-339165, 2002-50874, 2002-170840, 2002-246507, 2003-7896, and 2005-64470.
However, the multilayer circuit board with no core layer is disadvantageously less strong and easily cracks. It is significantly difficult in the prior art to reduce the thickness of the entire board while assuring reliable products.